rustc_target/spec/targets/
nvptx64_nvidia_cuda.rs

1use crate::spec::{
2    Arch, LinkSelfContainedDefault, LinkerFlavor, MergeFunctions, Os, PanicStrategy, Target,
3    TargetMetadata, TargetOptions, cvs,
4};
5
6pub(crate) fn target() -> Target {
7    Target {
8        arch: Arch::Nvptx64,
9        data_layout: "e-p6:32:32-i64:64-i128:128-i256:256-v16:16-v32:32-n16:32:64".into(),
10        llvm_target: "nvptx64-nvidia-cuda".into(),
11        metadata: TargetMetadata {
12            description: Some("--emit=asm generates PTX code that runs on NVIDIA GPUs".into()),
13            tier: Some(2),
14            host_tools: Some(false),
15            std: Some(false),
16        },
17        pointer_width: 64,
18
19        options: TargetOptions {
20            os: Os::Cuda,
21            vendor: "nvidia".into(),
22            linker_flavor: LinkerFlavor::Llbc,
23
24            cpu: "sm_70".into(),
25
26            // No longer supported architectures
27            unsupported_cpus: cvs!(
28                "sm_20", "sm_21", "sm_30", "sm_32", "sm_35", "sm_37", "sm_50", "sm_52", "sm_53",
29                "sm_60", "sm_61", "sm_62"
30            ),
31
32            // FIXME: create tests for the atomics.
33            max_atomic_width: Some(64),
34
35            // Unwinding on CUDA is neither feasible nor useful.
36            panic_strategy: PanicStrategy::Abort,
37
38            // Needed to use `dylib` and `bin` crate types and the linker.
39            dynamic_linking: true,
40
41            // Avoid using dylib because it contain metadata not supported
42            // by LLVM NVPTX backend.
43            only_cdylib: true,
44
45            // Let the `ptx-linker` to handle LLVM lowering into MC / assembly.
46            obj_is_bitcode: true,
47
48            // Clearly a GPU
49            is_like_gpu: true,
50
51            // Convenient and predicable naming scheme.
52            dll_prefix: "".into(),
53            dll_suffix: ".ptx".into(),
54            exe_suffix: ".ptx".into(),
55
56            // Disable MergeFunctions LLVM optimisation pass because it can
57            // produce kernel functions that call other kernel functions.
58            // This behavior is not supported by PTX ISA.
59            merge_functions: MergeFunctions::Disabled,
60
61            // The LLVM backend does not support stack canaries for this target
62            supports_stack_protector: false,
63
64            // Support using `self-contained` linkers like the llvm-bitcode-linker
65            link_self_contained: LinkSelfContainedDefault::True,
66
67            // Static initializers must not have cycles on this target
68            static_initializer_must_be_acyclic: true,
69
70            ..Default::default()
71        },
72    }
73}
rustc_target/spec/targets/nvptx64_nvidia_cuda.rs

rustc_target/spec/targets/
nvptx64_nvidia_cuda.rs
