rustc_target/spec/targets/
riscv32im_risc0_zkvm_elf.rs

1use crate::spec::{
2    Arch, Cc, LinkerFlavor, Lld, Os, PanicStrategy, RelocModel, Target, TargetMetadata,
3    TargetOptions,
4};
5
6pub(crate) fn target() -> Target {
7    Target {
8        data_layout: "e-m:e-p:32:32-i64:64-n32-S128".into(),
9        llvm_target: "riscv32".into(),
10        metadata: TargetMetadata {
11            description: Some("RISC Zero's zero-knowledge Virtual Machine (RV32IM ISA)".into()),
12            tier: Some(3),
13            host_tools: Some(false),
14            std: None, // ?
15        },
16        pointer_width: 32,
17        arch: Arch::RiscV32,
18
19        options: TargetOptions {
20            os: Os::Zkvm,
21            vendor: "risc0".into(),
22            linker_flavor: LinkerFlavor::Gnu(Cc::No, Lld::Yes),
23            linker: Some("rust-lld".into()),
24            cpu: "generic-rv32".into(),
25
26            // Some crates (*cough* crossbeam) assume you have 64 bit
27            // atomics if the target name is not in a hardcoded list.
28            // Since zkvm is singlethreaded and all operations are
29            // atomic, I guess we can just say we support 64-bit
30            // atomics.
31            max_atomic_width: Some(64),
32            atomic_cas: true,
33
34            features: "+m".into(),
35            llvm_abiname: "ilp32".into(),
36            executables: true,
37            panic_strategy: PanicStrategy::Abort,
38            relocation_model: RelocModel::Static,
39            emit_debug_gdb_scripts: false,
40            eh_frame_header: false,
41            singlethread: true,
42            ..Default::default()
43        },
44    }
45}
rustc_target/spec/targets/riscv32im_risc0_zkvm_elf.rs

rustc_target/spec/targets/
riscv32im_risc0_zkvm_elf.rs
